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rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a 3 v/5 v, 4/8 channel high performance analog multiplexers adg608/ADG609 ? analog devices, inc., 1995 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 general description the adg608 and ADG609 are monolithic cmos analog mul- tiplexers comprising eight single channels and four differential channels respectively, fully specified for 5 v, +5 v and +3 v power supplies. the adg608 switches one of eight inputs to a common output as determined by the 3-bit binary address lines a0, a1 and a2. the ADG609 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines a0 and a1. an en input on both de- vices is used to enable or disable the device. when disabled, all channels are switched off. all the address and enable inputs are ttl compatible over the full specified operating tempera- ture range, making the parts suitable for bus-controlled systems such as data acquisition systems, process controls, avionics and ates since the ttl compatible address inputs simplify the digital interface design and reduce the board space requirements. the adg608/ADG609 are designed on an enhanced lc 2 mos process that provides low power dissipation yet gives high switching speed and low on resistance. each channel conducts equally well in both directions when on and has an input signal range which extends to the supplies. in the off condition, sig- nal levels up to the supplies are blocked. all channels exhibit break-before-make switching action preventing momentary shorting when switching channels. inherent in the design is low charge injection for minimum transients when switching the digital inputs. the ability to operate from single +3 v, +5 v or 5 v bipolar supplies makes the adg608 and ADG609 perfect for use in battery operated instruments and with the new generation of dacs and adcs from analog devices. the use of 5 v sup- plies and reduced operating currents gives much lower power dissipation than devices operating from 15 v supplies. product highlights 1. extended signal range the adg608/ADG609 are fabricated on an enhanced lc 2 mos process giving an increased signal range which extends to the supplies. 2. low power dissipation 3. low r on 4. fast switching times 5. break-before-make switching switches are guaranteed break-before-make so that input signals are protected against momentary shorting. 6. single/dual supply operation ordering guide model temperature range package option* adg608bn C40 c to +85 c n-16 adg608br C40 c to +85 c r-16a adg608bru C40 c to +85 c ru-16 adg608tru C55 c to +125 c ru-16 ADG609bn C40 c to +85 c n-16 ADG609br C40 c to +85 c r-16a ADG609bru C40 c to +85 c ru-16 *n = plastic dip; ru = thin shrink small outline package (tssop); r = 0.15" small outline ic (soic). functional block diagrams s1 s8 a0 d a1 a2 en 1 of 8 decoder adg608 s1a a0 da a1 s4a s1b s4b db en 1 of 4 decoder ADG609 features +3 v, +5 v, 6 5 v power supplies v ss to v dd analog signal range low on resistance (30 v max) fast switching times t on 75 ns max t off 45 ns max low power dissipation (1.5 m w max) break-before-make construction esd > 5000 v as per military standard 3015.7 ttl and cmos compatible inputs applications automatic test equipment data acquisition systems communication systems avionics and military systems microprocessor controlled analog systems medical instrumentation battery powered instruments remote powered equipment compatible with 6 5 v dacs and adcs such as ad7840/8, ad7870/1/2/4/5/6/8
adg608/ADG609Cspecifications rev. a C2C parameter b version t version +25 8 c C40 c to +25 8 c C55 8 c to test conditions/ +85 8 c +125 8 c units comments analog switch analog signal range v ss to v dd v ss to v dd v r on 22 22 w typ C3.5 v < v s < +3.5 v, i s = C1 ma; 30 35 30 40 w max v dd = +4.5 v, v ss = C4.5 v; test circuit 1 d r on 56 56 w max C3 v < v s < +3 v, i ds = C1 ma; v dd = +5 v, v ss = C5 v r on match 2 3 2 3 w max v s = 0 v, i ds = C1 ma; v dd = +5 v, v ss = C5 v leakage currents v dd = +5.5 v, v ss = C5.5 v source off leakage i s (off) 0.05 0.05 na typ v d = 4.5 v, v s = 7 4.5 v; 0.5 2 0.5 10 na max test circuit 2 drain off leakage i d (off) 0.05 0.05 na typ v d = 4.5 v, v s = 7 4.5 v; adg608 0.5 2 0.5 10 na max test circuit 3 ADG609 0.5 1 0.5 5 na max channel on leakage i d , i s (on) 0.05 0.05 na typ v s = v d = 4.5 v; adg608 0.5 3 0.5 20 na max test circuit 4 ADG609 0.5 1.5 0.5 10 na max digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 1 1 m a max v in = 0 or v dd c in , digital input capacitance 5 5 pf typ dynamic characteristics 2 t transition 50 50 ns typ r l = 300 w , c l = 35 pf; 75 90 75 100 ns max v s1 = 3.5 v, v s8 = 7 3.5 v; test circuit 5 t open 10 10 ns min r l = 300 w , c l = 35 pf; v s = +3.5 v; test circuit 6 t on (en) 50 50 ns typ r l = 300 w , c l = 35 pf; 75 90 75 100 ns max v s = +3.5 v; test circuit 7 t off (en) 30 30 ns typ r l = 300 w , c l = 35 pf; 45 60 45 75 ns max v s = +3.5 v; test circuit 7 charge injection 6 6 pc typ v s = 0 v, r s = 0 w , c l = 1 nf; test circuit 8 off isolation 85 85 db typ r l = 1 k w , c l = 15 pf, f = 100 khz; v s = 3 v rms; test circuit 9 channel-to-channel crosstalk 85 85 db typ r l = 1 k w , c l = 15 pf, f = 100 khz; test circuit 10 c s (off) 9 9 pf typ c d (off) adg608 40 40 pf typ ADG609 20 20 pf typ c d (on) adg608 54 54 pf typ ADG609 34 34 pf typ power requirements i dd 0.05 0.2 0.05 0.2 m a typ v in = 0 v or v dd 0.2 2 0.2 2 m a max i ss 0.01 0.1 0.01 0.1 m a typ 0.1 1 0.1 1 m a m ax notes 1 temperature ranges are as follows: b version: C40 c to +85 c; t version: C55 c to +125 c. 2 guaranteed by design, not subject to production test. specifications subject to change without notice. dual supply 1 (v dd = +5 v 6 10%, v ss = C5 v 6 10%, gnd = 0 v, unless otherwise noted)
parameter b version t version +25 8 c C40 8 c to +25 8 c C55 8 c to test conditions/ +85 8 c +125 8 c units comments analog switch analog signal range 0 to v dd 0 to v dd v r on 40 40 w typ v s = +3.5 v, i s = C1 ma; 50 60 50 70 w max v dd = +4.5 v; test circuit 1 d r on 56 56 w max +1 v < v s < +3 v, i ds = C1 ma; v dd = +5 v r on match 2 3 2 3 w max v s = 0 v, i ds = C1 ma; v dd = +5 v leakage currents v dd = +5.5 v source off leakage i s (off) 0.05 0.05 na typ v d = 4.5 v/0.1 v, v s = 0.1 v/4.5 v; 0.5 2 0.5 10 na max test circuit 2 drain off leakage i d (off) 0.05 0.05 na typ v d = 4.5 v/0.1 v, v s = 0.1 v/4.5 v; adg608 0.5 2 0.5 10 na max test circuit 3 ADG609 0.5 1 0.5 5 na max channel on leakage i d , i s (on) 0.05 0.05 na typ v s = v d = 4.5 v/0.1 v; adg608 0.5 3 0.5 20 na max test circuit 4 ADG609 0.5 1.5 0.5 10 na max digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 1 1 m a max v in = 0 or v dd c in , digital input capacitance 5 5 pf typ dynamic characteristics 2 t transition 80 80 ns typ r l = 300 w , c l = 35 pf; 100 130 100 150 ns max v s1 = 3.5 v/0 v, v s8 = 0 v/3.5 v; test circuit 5 t open 10 10 ns min r l = 300 w , c l = 35 pf; v s = +3.5 v; test circuit 6 t on (en) 80 80 ns typ r l = 300 w , c l = 35 pf; 100 130 100 150 ns max v s = +3.5 v; test circuit 7 t off (en) 40 40 ns typ r l = 300 w , c l = 35 pf; 50 60 50 75 ns max v s = +3.5 v; test circuit 7 charge injection 0.5 0.5 pc typ v s = 0 v, r s = 0 w , c l = 1 nf; 3 3 pc max test circuit 8 off isolation 85 85 db typ r l = 1 k w , c l = 15 pf, f = 100 khz; v s = 1.5 v rms; test circuit 9 channel-to-channel crosstalk 85 85 db typ r l = 1 k w , c l = 15 pf, f = 100 khz; test circuit 10 c s (off) 9 9 pf typ c d (off) adg608 40 40 pf typ ADG609 20 20 pf typ c d (on) adg608 54 54 pf typ ADG609 34 34 pf typ power requirements i dd 0.05 0.2 0.05 0.2 m a typ v in = 0 v or v dd 0.2 2 0.2 2 m a max notes 1 temperature ranges are as follows: b version: C40 c to +85 c; t version: C55 c to +125 c. 2 guaranteed by design, not subject to production test. specifications subject to change without notice. single supply 1 (v dd = +5 v 6 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted) adg608/ADG609 rev. a C3C
single supply 1 rev. a C4C (v dd = +3.3 v 6 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted) parameter b version t version +25 8 c C40 8 c to +25 8 c C55 8 c to test conditions/ +85 8 c +125 8 c units comments analog switch analog signal range 0 to v dd 0 to v dd v r on 60 60 w typ v s = +1.5 v, i s = C1 ma; 90 100 90 120 w max v dd = +3 v; test circuit 1 r on match 3 3 3 3 w max v s = 0 v, i ds = C1 ma, v dd = +3.3 v leakage currents v dd = +3.6 v source off leakage i s (off) 0.05 0.05 na typ v d = 2.6 v/0.1 v, v s = 0.1 v/2.6 v; 0.5 2 0.5 10 na max test circuit 2 drain off leakage i d (off) 0.05 0.05 na typ v d = 2.6 v/0.1 v, v s = 0.1 v/2.6 v; adg608 0.5 2 0.5 10 na max test circuit 3 ADG609 0.5 1 0.5 5 na max channel on leakage i d , i s (on) 0.05 0.05 na typ v s = v d = 2.6 v/0.1 v; adg608 0.5 3 0.5 20 na max test circuit 4 ADG609 0.5 1.5 0.5 10 na max digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 1 1 m a max v in = 0 or v dd c in , digital input capacitance 5 5 pf typ dynamic characteristics 2 t transition 120 120 ns typ r l = 300 w , c l = 35 pf; 170 225 170 250 ns max v s1 = 1.5 v/0 v, v s8 = 0 v/1.5 v; test circuit 5 t open 10 10 ns min r l = 300 w , c l = 35 pf; v s = +1.5 v; test circuit 6 t on (en) 120 120 ns typ r l = 300 w , c l = 35 pf; 170 225 170 250 ns max v s = +1.5 v; test circuit 7 t off (en) 40 40 ns typ r l = 300 w , c l = 35 pf; 60 75 60 90 ns max v s = +1.5 v; test circuit 7 charge injection 0.5 0.5 pc typ v s = 0 v, r s = 0 w , c l = 1 nf; 3 3 pc max test circuit 8 off isolation 85 85 db typ r l = 1 k w , c l = 15 pf, f = 100 khz; v s = 1 v rms; test circuit 9 channel-to-channel crosstalk 85 85 db typ r l = 1 k w , c l = 15 pf, f = 100 khz; test circuit 10 c s (off) 9 9 pf typ c d (off) adg608 40 40 pf typ ADG609 20 20 pf typ c d (on) adg608 54 54 pf typ ADG609 34 34 pf typ power requirements i dd 0.05 0.2 0.05 0.2 m a typ v in = 0 v or v dd 0.2 2 0.2 2 m a max notes 1 temperature ranges are as follows: b version: C40 c to +85 c; t version: C55 c to +125 c. 2 guaranteed by design, not subject to production test. specifications subject to change without notice. adg608/ADG609Cspecifications
adg608/ADG609 rev. a C5C absolute maximum ratings 1 (t a = +25 c unless otherwise noted) v dd to v ss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +13 v v dd to gnd . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +6.5 v v ss to gnd . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 v to C6.5 v analog, digital inputs 2 . . . . . . . . . . . . . . C0.3 v to v dd + 2 v or 20 ma, whichever occurs first continuous current, s or d . . . . . . . . . . . . . . . . . . . . 20 ma peak current, s or d (pulsed at 1 ms, 10% duty cycle max) . . . . . . . . . . 40 ma operating temperature range industrial (b version) . . . . . . . . . . . . . . . . C40 c to +85 c extended (t version) . . . . . . . . . . . . . . . C 55 c to +125 c storage temperature range . . . . . . . . . . . . C65 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . +150 c plastic dip package q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . 117 c/w lead temperature, soldering (10 sec) . . . . . . . . . . +260 c soic package q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . . . 77 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c tssop package q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . . 158 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >5000 v notes 1 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. 2 overvoltages at a, s, d or en will be clamped by internal diodes. current should be limited to the maximum ratings given. pin configurations dip/soic/tssop dip/soic/tssop a0 en a1 gnd s2a s3a s4a s2b s3b s4b v ss s1a v dd s1b da db 1 2 16 15 5 6 7 12 11 10 3 4 14 13 8 9 top view (not to scale) ADG609 a0 en s2 s3 s4 v ss s1 d 1 2 16 15 5 6 7 12 11 10 3 4 14 13 8 9 top view (not to scale) adg608 a1 a2 s5 s6 s7 gnd v dd s8 table i. adg608 truth table a2 a1 a0 en on switch x x x 0 none 00 0 1 1 00 1 1 2 01 0 1 3 01 1 1 4 10 0 1 5 10 1 1 6 11 0 1 7 11 1 1 8 x = dont care table ii. ADG609 truth table a1 a0 en on switch pair x x 0 none 00 1 1 01 1 2 10 1 3 11 1 4 x = dont care
rev. a C6C 50 45 0 25 15 10 5 40 30 20 35 v d (v s ) ?volts v dd = +3v v ss = ?v v dd = +5v v ss = ?v on resistance ? w ?.0 5.0 ?.0 0.0 3.0 4.0 ?.0 ?.0 ?.0 1.0 2.0 t a = +25 o c figure 1. r on as a function of v d (v s ): dual supply voltage 50 on resistance ? w 45 0 ?.0 5.0 ?.0 0.0 3.0 4.0 25 15 10 5 40 30 20 35 ?.0 ?.0 ?.0 1.0 2.0 v d (v s ) ?volts v dd = +5v v ss = ?v +125 o c +85 o c +25 o c figure 2. r on as a function of v d (v s ) for different temperatures 100 on resistance ? w 90 0 0.0 3.0 0.5 1.5 50 30 20 10 80 60 40 70 1.0 2.5 2.0 v dd = +3v v ss = 0v +125 o c +85 o c +25 o c v d (v s ) ?volts figure 3. r on as a function of v d (v s ) for different temperatures adg608/ADG609Ctypical performance characteristics 100 on resistance ? w 90 0 0.0 5.0 0.5 2.5 4.0 4.5 50 30 20 10 80 60 40 70 1.0 1.5 2.0 3.0 3.5 v d (v s ) ?volts v dd = +3v v ss = 0v v dd = +5v v ss = 0v t a = +25 o c figure 4. r on as a function of v d (v s ): single supply voltage 100 on resistance ? w 90 0 0.0 5.0 0.5 2.5 4.0 4.5 50 30 20 10 80 60 40 70 1.0 1.5 2.0 3.0 3.5 v d (v s ) ?volts v dd = +5v v ss = 0v +125 o c +85 o c +25 o c figure 5. r on as a function of v d (v s ) for different temperatures v s , v d ?volts 0.03 0.00 ?.03 ? 5 ? leakage currents ?na ? ? ? 0 1 2 3 4 0.02 0.01 ?.01 ?.02 i d (off) i d (on) i s (off) v dd = +5v v ss = ?v t a = +25 o c figure 6. leakage currents as a function of v d (v s )
adg608/ADG609 rev. a C7C v s ,v d ?volts 0.02 0.01 ?.01 05 1234 0.00 v dd = +5v v ss = 0v t a = +25 o c i d (off) i d (on) i s (off) leakage currents ?na figure 7. leakage currents as a function of v d (v s ) frequency ?hz 10 4 10 3 10 ? 10 10m 100 1k 10k 100k 1m 10 2 10 1 10 0 v dd = +5v v ss = ?v en = 2.4v en = 0v i dd ?? figure 8. positive supply current vs. switching frequency source voltage ?v 30 20 ?0 ? 5 ? charge injection ?pc ? ? ? 0 1 2 3 4 10 0 c l = 1nf v dd = +5v v ss = ?v v dd = +5v v ss = 0v v dd = +3v v ss = 0v figure 9. charge injection vs. analog voltage v s v s , v d ?volts 0.02 0.01 ?.01 0 3.0 0.5 leakage currents ?na 1.0 1.5 2.0 2.5 0.00 i d (off) i d (on) i s (off) v dd = +3v v ss = 0v t a = +25 o c figure 10. leakage currents as a function of v d (v s ) i ss ?? frequency ?hz 10 4 10 3 10 ? 10 10m 100 1k 10k 100k 1m 10 2 10 1 10 0 v dd = +5v v ss = ?v en = 2.4v en = 0v 10 ? figure 11. negative supply current vs. switching frequency frequency ?hz 120 110 50 100 1m 1k db 10k 100k 90 80 70 60 100 v dd = +5v v ss = ?v figure 12. crosstalk and off isolation vs. frequency
rev. a C8C adg608/ADG609 test circuits v d s1 s2 s8 v s v ss v dd i d (off) v ss v dd +0.8v d en a gnd test circuit 3. i d (off) i d (on) v d s1 s8 v s v ss v dd v ss v dd +2.4v d en a gnd test circuit 4. i d (on) i ds s r on = v 1 /i ds v1 v s d test circuit 1. on resistance v s i s (off) v d s1 s2 s8 v ss v dd v ss v dd +0.8v d en a gnd test circuit 2. i s (off) test circuit 5. switching time of multiplexer, t transition 3v 50% v out t transition 90% 90% t transition address drive (v in ) 50% a2 v out v ss v dd d v s1 * similar connection for ADG609 a1 a0 en gnd adg608* s1 s8 s2 thru s7 v in +2.4v 50 w v s8 r l 300 w c l 35pf v ss v dd 0v
adg608/ADG609 rev. a C9C a2 v out v ss v dd d v s * similar connection for ADG609 a1 a0 en gnd adg608 * s1 s8 s2 thru s7 v in +2.4v 50 w r l 300 w c l 35pf v ss v dd address drive (v in ) 3v v out t open 80% 80% 0v test circuit 6. break-before-make delay, t open 3v 50% output 0.9v 0 50% t on (en) 0.9v 0 0v v 0 0v t off (en) enable drive (v in ) a2 v out v ss v dd d v s * similar connection for ADG609 a1 a0 en gnd adg608 * s1 s2 thru s8 v in 50 w r l 300 w c l 35pf v ss v dd test circuit 7. enable delay, t on (en), t off (en) d v out 3v v out logic input (v in ) q inj = c l x d v out 0v a2 v out v ss v dd d * similar connection for ADG609 a1 a0 en gnd adg608 * v in c l 1nf v ss v dd s r s v s test circuit 8. charge injection
rev. a C10C adg608/ADG609 a2 v out v ss v dd d a1 a0 en gnd adg608 r l 1k w v ss v dd s1 v s s2 s8 2.4v 1k w test circuit 10. channel-to-channel crosstalk a2 v out v ss v dd d a1 a0 en gnd adg608 r l 1k w v ss v dd s1 v s s8 test circuit 9. off isolation terminology v dd most positive power supply potential. v ss most negative power supply potential in dual supplies. in single supply applications, it may be connected to ground. gnd ground (0 v) reference. r on ohmic resistance between d and s. d r on r on variation due to a change in the analog input voltage with a constant load current. r on match difference between the r on of any two channels. i s (off) source leakage current when the switch is off. i d (off) drain leakage current when the switch is off. i d , i s (on) channel leakage current when the switch is on. v d , v s analog voltage on terminals d, s. c s (off) channel input capacitance for off condition. c d (off) channel output capacitance for off condition. c d , c s (on) on switch capacitance. c in digital input capacitance. t on (en) delay time between the 50% and 90% points of the digital input and switch on condition. t off (en) delay time between the 50% and 90% points of the digital input and switch off condition. t transition delay time between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. t open off time measured between the 80% points of both switches when switching from one address state to another. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl (i inh ) input current of the digital input. crosstalk a measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an off channel. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching. i dd positive supply current. i ss negative supply current.
adg608/ADG609 rev. a C11C outline dimensions dimensions shown in inches and (mm). 16-pin plastic (n-16) 0.840 (21.33) 0.745 (18.93) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) pin 1 0.280 (7.11) 0.240 (6.10) 9 16 18 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc seating plane 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) 0.070 (1.77) 0.045 (1.15) 16-pin soic (r-16a) 16 9 8 1 0.3937 (10.00) 0.3859 (9.80) 0.2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) pin 1 seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0688 (1.75) 0.0532 (1.35) 0.0500 (1.27) bsc 0.0099 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 16-pin tssop (ru-16) 16 9 8 1 0.201 (5.10) 0.193 (4.90) 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30) pin 1 seating plane 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) bsc 0.0433 (1.10) max 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50) 8 0
c2021aC18C4/96 printed in u.s.a. C12C

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